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SUPPORT INFORMATION

4-2 MPC505EVBUM/D

Table 4-1. SCSI Connector (not populated)

Pin Mnemonic Signal

1 GND GROUND

2 SDB0 SCSI DATA BUS (bit 0) – Bit 0 of the SCSI bi-directional data bus lines.

3 GND GROUND

4 SDB1 SCSI DATA BUS (bit 1) – Bit 1 of the SCSI bi-directional data bus lines.

5 GND GROUND

6 SDB2 SCSI DATA BUS (bit 2) – Bit 2 of the SCSI bi-directional data bus lines.

7 GND GROUND

8 SDB3 SCSI DATA BUS (bit 3) – Bit 3 of the SCSI bi-directional data bus lines.

9 GND GROUND

10 SDB4 SCSI DATA BUS (bit 4) – Bit 4 of the SCSI bi-directional data bus lines.

11 GND GROUND

12 SDB5 SCSI DATA BUS (bit 5) – Bit 5 of the SCSI bi-directional data bus lines.

13 NC Not Connected

14 SDB6 SCSI DATA BUS (bit 6) – Bit 6 of the SCSI bi-directional data bus lines.

15 GND GROUND

16 SDB7 SCSI DATA BUS (bit 7) – Bit 7 of the SCSI bi-directional data bus lines.

17 GND GROUND

18 SDBP SCSI DATA BUS PARITY – SCSI bi-directional data parity line.

19 – 25 GND GROUND

26 VCC +5 VDC POWER – Input voltage (+5 Vdc @ 2.0 A) used by the EVB

logic circuits.

FUNCTIONAL DESCRIPTION

MPC505EVBUM/D 3-7

3.5 I/O CONNECTORS

There are two 64-pin expansion connectors on the BCC (P1 and P2). Through these connectors

the BCC communicates with the PFB or target system. Background mode operation is available

through P3 and serial communication through P4. Chapter 5 contains a description of the

interface connectors pin assignments.

3.5.1 64-Pin Expansion Connectors

The expansion connectors interconnect the BCC to the PFB or target system. The pin-outs of the

MC68332 MCU device, serial communication, and background mode interface are available on

the expansion connectors.

3.5.2 Serial Communication Connectors

A terminal or host computer with terminal emulation (PCKERMIT.EXE, PROCOMM, etc.), can

be connected to the BCC or to the PFB. Terminal connections are provided through the serial

communication connectors, BCC P4 or to PFB P9.

3.5.3 Background Mode Interface Connector

The background debug mode is implemented in MCU microcode. In background mode, registers

can be viewed or altered, memory can be read or written, and test features can be executed.

Background mode is initiated by one of several sources: externally generated breakpoints,

internal peripherally generated breakpoints, software, and catastrophic exception conditions.

Instruction execution is suspended for the duration of background mode. Background mode

communications between the BCC and the development system are via a serial link (P3).

3.6 PFB DESCRIPTION

The PFB is the physical location for installing the BCC. The user may expand the user accessible

memory. I/O connectors are available for communication, power, and a logic analyzer.

3.6.1 Floating-Point Coprocessor Socket (U5)

Socket U5 on the PFB accommodates an optional coprocessor for the EVB. Either an MC68881

or an MC68882 coprocessor can be used in socket U5. The coprocessor software interface is not

part of the EVB, so must be provided by the user. For developing the coprocessor software

interface, see the application note MC68881 Floating-Point Coprocessor as a Peripheral in an

M68000 System, AN947.

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Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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