Motorola MC68328 Información técnica descargar pdf (Pagina 17)

Hardware Development

FLEX Development Kit

FLEX Alphanumeric Chip MC68175 Interface

2-5

2.1.3 FLEX Development/Evaluation Board Interface

The FLEX Development Board interfaces with the MC68328 ADS evaluation board via a

standard SPI.

Figure 2-3

describes the hardware interface between the FLEX

Development Board and the MC68328 ADS board.

Figure 2-3

FLEX Development Board/Dragonball ADS Board SPI interface

2.1.4 SPI Interface Signals

The signals associated with the SPI shown in

Figure 2-3

are as follows:

• ERESET

(JP4 Header, Pin 1) is the reset signal to the FLEX Alphanumeric Chip IC.

This pin should connect to a general-purpose output port pin (e.g., Port K Pin 3),

so that the FLEX One-Way Stack software running on the host can reset the FLEX

Alphanumeric Chip.

• READY

(JP4 Header, Pin 2) is connected to an interrupt pin on the host MPU.

When the FLEX Alphanumeric Chip would like to talk to the host MPU, it will

EREADY

ESCK

EMOSI

EMISO

ESS

EVcc

GND

JP4 Header

VME Connections

PK-3

IRQ6

SPCLK0

SPTXD0

SPRXD0

PJ-4

Vcc

GND

FLEX

Development

Board

MC68328

ADSBoard

Dragonball

P14–B17

P14–C14

P14–A14

P14–B14

P14–B6

P14–B28

P14–B27

3.3 V

Output Port)

Vcc

ERESET

(General-Purpose

AA1420

Frees

cale Semiconductor,

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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