M68CPU32BUG/DREV 1May 1995M68CPU32BUG DEBUG MONITORUSER’S MANUALM68CPU32BUG/D© MOTOROLA, INC., 1991, 1995; All Rights Reserved
GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-2POWER-UP/RESETWARM START?SET DEBUGGERDIRECTORYDISPLAY DEBUGGERNAME AND VERSIONDISPLAY WARMSTART MESSAGEYESD
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-70VE Verify S-Records Against Memory VEThen converted into an S-Record file named TEST.MX as follows:S00A
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-71VE Verify S-Records Against Memory VENow change the program in memory and perform the verification agai
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-72
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-1CHAPTER 4ASSEMBLER/DISASSEMBLER4.1 INTRODUCTIONIncluded as part of the CPU32Bug firmware is a one-line assemble
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-24.1.2 M68300 Family Resident Structured Assembler ComparisonThere are several major differences between the CPU
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-34.2.1 Source Line FormatEach source statement is a combination of operation and, as required, operand fields. L
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-44.2.1.2 Operand FieldIf present, the operand field follows the operation field and is separated from the operat
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-54.2.1.4 Mnemonics and DelimitersThe assembler recognizes all M68300 Family instruction mnemonics. Numbers are r
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-64.2.1.5 Character SetThe character set recognized by the CPU32Bug assembler is a subset of ASCII and listed bel
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-7Table 4-1 summarizes the CPU32Bug one-line assembler addressing modes.Table 4-1. CPU32Bug Assembler Addressing
GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-31.3 USING THIS MANUALThose users unfamiliar with debugging packages should read Chapter 1 before attemptin
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-8Allowed operators are:Addition +Subtraction -Multiply *Divide /Shift left <<Shift right >>Bitwise o
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-9When specifying operands, the user may skip or omit entries with the following addressingmodes.• Address regis
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-10EXAMPLES DESCRIPTION00010022 04D2 DC.W 1234 Decimal number00010024 AAFE DC.W &AAFE Hexadecimal number00010
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-114.3.1 Executing the Assembler/DisassemblerThe assembler/disassembler is actuated using the ;DI option of the M
ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-124.3.3 Entering Branch and Jump AddressesWhen entering a source line containing a branch instruction (BRA, BGT,
SYSTEM CALLSM68CPU32BUG/D REV 1 5-1CHAPTER 5SYSTEM CALLS5.1 INTRODUCTIONThis chapter describes the CPU32Bug TRAP #15 handler, which allows system cal
SYSTEM CALLSM68CPU32BUG/D REV 1 5-2It is necessary to create an equate file with the routine names equated to their respective codes, ordownload the
SYSTEM CALLSM68CPU32BUG/D REV 1 5-3Table 5-1. CPU32Bug System Call RoutinesFunction Trap Code Description.BINDEC $0064 Convert binary to Binary Coded
SYSTEM CALLSM68CPU32BUG/D REV 1 5-4.BINDEC Calculate BCD Equivalent Specified Binary Number .BINDEC5.2.1 Calculate BCD Equivalent Specified Binary Nu
SYSTEM CALLSM68CPU32BUG/D REV 1 5-5.CHANGEV Parse Value, Assign to Variable .CHANGEV5.2.2 Parse Value, Assign to VariableSYSCALL .CHANGEVTRAP CODE: $
GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-4NOTEIn order for high-baud rate serial communication betweenCPU32Bug and the terminal to function properly,
SYSTEM CALLSM68CPU32BUG/D REV 1 5-6.CHANGEV Parse Value, Assign to Variable .CHANGEVIf the above code was called with a syscall routine and BUFFER co
SYSTEM CALLSM68CPU32BUG/D REV 1 5-7.CHKBRK Check for Break .CHKBRK5.2.3 Check for BreakSYSCALL .CHKBRKTRAP CODE: $0005Returns zero (0) status in cond
SYSTEM CALLSM68CPU32BUG/D REV 1 5-8.DELAY Timer Delay Function .DELAY5.2.4 Timer Delay FunctionSYSCALL .DELAYTRAP CODE: $0043The .DELAY function gene
SYSTEM CALLSM68CPU32BUG/D REV 1 5-9.DIVU32 Unsigned 32 x 32 Bit Divide .DIVU325.2.5 Unsigned 32 x 32 Bit DivideSYSCALL .DIVU32TRAP CODE: $006ADivide
SYSTEM CALLSM68CPU32BUG/D REV 1 5-10.ERASLN Erase Line .ERASLN5.2.6 Erase LineSYSCALL .ERASLNTRAP CODE: $0027Use .ERASLN to erase the line at the pre
SYSTEM CALLSM68CPU32BUG/D REV 1 5-11.INCHR Input Character Routine .INCHR5.2.7 Input Character RoutineSYSCALL .INCHRTRAP CODE: $0000Reads a character
SYSTEM CALLSM68CPU32BUG/D REV 1 5-12.INLN Input Line Routine .INLN5.2.8 Input Line RoutineSYSCALL .INLNTRAP CODE: $0002Reads a line from the default
SYSTEM CALLSM68CPU32BUG/D REV 1 5-13.INSTAT Input Serial Port Status .INSTAT5.2.9 Input Serial Port StatusSYSCALL .INSTATTRAP CODE: $0001Checks the d
SYSTEM CALLSM68CPU32BUG/D REV 1 5-14.MULU32 Unsigned 32 x 32 Bit Multiply .MULU325.2.10 Unsigned 32 x 32 Bit MultiplySYSCALL .MULU32TRAP CODE: $0069M
SYSTEM CALLSM68CPU32BUG/D REV 1 5-15.OUTCHR Output Character Routine .OUTCHR5.2.11 Output Character RoutineSYSCALL .OUTCHRTRAP CODE: $0020Outputs a c
GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-51.5.3 BreakThe BREAK key on the terminal keyboard initiates a break. Break does not generate aninterrupt.
SYSTEM CALLSM68CPU32BUG/D REV 1 5-16.OUTLN Output String Using Pointers .OUTLN.OUTSTR .OUTSTR5.2.12 Output String Using PointersSYSCALL .OUTLNTRAP CO
SYSTEM CALLSM68CPU32BUG/D REV 1 5-17.PCRLF Print Carriage Return and Line Feed .PCRLF5.2.13 Print Carriage Return and Line FeedSYSCALL .PCRLFTRAP COD
SYSTEM CALLSM68CPU32BUG/D REV 1 5-18.READLN Read Line to Fixed-Length Buffer .READLN5.2.14 Read Line to Fixed-Length BufferSYSCALL .READLNTRAP CODE:
SYSTEM CALLSM68CPU32BUG/D REV 1 5-19.READSTR Read String Into Variable-Length Buffer .READSTR5.2.15 Read String Into Variable-Length BufferSYSCALL .R
SYSTEM CALLSM68CPU32BUG/D REV 1 5-20.RETURN Return to CPU32Bug .RETURN5.2.16 Return to CPU32BugSYSCALL .RETURNTRAP CODE: $0063.RETURN restores contro
SYSTEM CALLSM68CPU32BUG/D REV 1 5-21.SNDBRK Send Break .SNDBRK5.2.17 Send BreakSYSCALL .SNDBRKTRAP CODE: $0029Use .SNDBRK to send a break to the defa
SYSTEM CALLSM68CPU32BUG/D REV 1 5-22.STRCMP Compare Two Strings .STRCMP5.2.18 Compare Two StringsSYSCALL .STRCMPTRAP CODE: $0068An equality compariso
SYSTEM CALLSM68CPU32BUG/D REV 1 5-23.TM_INI Timer Initialization .TM_INI5.2.19 Timer InitializationSYSCALL .TM_INITRAP CODE: $0040Use .TM_INI to init
SYSTEM CALLSM68CPU32BUG/D REV 1 5-24.TM_RD Read Timer .TM_RD5.2.20 Read TimerSYSCALL .TM_RDTRAP CODE: $0042Use this routine to read the timer value
SYSTEM CALLSM68CPU32BUG/D REV 1 5-25.TM_STR0 Start Timer at T=0 .TM_STR05.2.21 Start Timer at T=0SYSCALL .TM_STR0TRAP CODE: $0041Use this routine to
GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-6INTERNAL RAM(1) XXX7FF(2) XXX000MCU INTERNAL MODULES SYSTEM RAM BCC: U2 & U3TARGET RAM BCC: U2 &
SYSTEM CALLSM68CPU32BUG/D REV 1 5-26.TM_STR0 Start Timer at T=0 .TM_STR0MOVE.L #$00000002,-(A7)Reset the timer to zero and start it with the default
SYSTEM CALLSM68CPU32BUG/D REV 1 5-27.WRITD Output String with Data ..WRITD.WRITDLN .WRITDLN5.2.22 Output String with DataSYSCALL .WRITD – Output str
SYSTEM CALLSM68CPU32BUG/D REV 1 5-28.WRITD Output String with Data ..WRITD.WRITDLN .WRITDLNEXAMPLEThe following section of code ...ERRMESSG DC.B $1
SYSTEM CALLSM68CPU32BUG/D REV 1 5-29.WRITE Output String Using Character Count .WRITE.WRITELN .WRITELN5.2.23 Output String Using Character CountSYSCA
SYSTEM CALLSM68CPU32BUG/D REV 1 5-30.WRITE Output String Using Character Count .WRITE.WRITELN .WRITELN . . . . . prints this message:MOTOROLA QUALITY
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-1CHAPTER 6DIAGNOSTIC FIRMWARE GUIDE6.1 INTRODUCTIONThis diagnostic guide contains operation informatio
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-2To execute a particular test, for example CPU, enter CPU X (X = the desired sub-command).This command
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-36.2.7 Stop-On-Error Mode (SE)Use the stop-on-error mode (SE) to halt a test at the point where an er
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-46.2.13 Zero Pass Count (ZP)Executing this command resets the pass counter DP to zero. This is freque
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-56.3.2 Read LoopRL.<SIZE> [<ADDR> [<DEL><DATA>]]The RL command executes a st
GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-71.7 TERMINAL INPUT/OUTPUT CONTROLWhen entering a command at the prompt, the following control codes may ha
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-6CPU CPU Tests For The MCU CPU6.4 CPU TESTS FOR THE MCUCPU tests are a series of diagnostics used to
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-7CPU A Register Test CPU A6.4.1 Register TestCPU32Diag>CPU ACPU A executes a thorough test of all
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-8CPU B Instruction Test CPU B6.4.2 Instruction TestCPU32Diag>CPU BCPU B tests various data movemen
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-9CPU C Address Mode Test CPU C6.4.3 Address Mode TestCPU32Diag>CPU CCPU C tests the various addres
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-10CPU D Exception Processing Test CPU D6.4.4 Exception Processing TestCPU32Diag>CPU DCPU D tests m
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-11MT Memory Tests MT6.5 MEMORY TESTS (MT)The memory tests are a series of diagnostics which verify ra
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-12The following describes the memory error display format for memory tests E through J. The errorrepor
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-13MT A Set Function Code MT A6.5.1 Set Function CodeCPU32Diag>MT A [new value]MT A allows the user
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-14MT B Set Start Address MT B6.5.2 Set Start AddressCPU32Diag>MT B [new value]MT B allows the user
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-15MT C Set Stop Address MT C6.5.3 Set Stop AddressCPU32Diag>MT C [new value]MT C allows the user t
GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-8
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-16MT D Set Bus Data Width MT D6.5.4 Set Bus Data WidthCPU32Diag>MT D [new value: 0 for 16, 1 for 3
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-17MT E March Address Test MT E6.5.5 March Address TestCPU32Diag>MT EMT E performs a march address
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-18MT F Walk a Bit Test MT F6.5.6 Walk a Bit TestCPU32Diag>MT FMT F performs a walking bit test fro
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-19MT G Refresh Test MT G6.5.7 Refresh TestCPU32Diag>MT GMT G performs a refresh test from Start Ad
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-20MT H Random Byte Test MT H6.5.8 Random Byte TestCPU32Diag>MT HMT H performs a random byte test f
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-21MT I Program Test MT I6.5.9 Program TestCPU32Diag>MT IMT I moves a program segment into RAM and
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-22MT J Test and Set Test MT J6.5.10 Test and Set TestCPU32Diag>MT JMT J performs a Test and Set (T
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-23BERR Bus Error Test BERR6.6 BUS ERROR TESTCPU32Diag>BERRBERR tests for local bus time-out and glo
DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-24
S-RECORD INFORMATIONM68CPU32BUG REV 1 A-1APPENDIX AS-RECORD INFORMATIONA.1 INTRODUCTIONThe S-record format for output modules was devised for the pur
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-1CHAPTER 2DEBUG MONITOR DESCRIPTION2.1 INTRODUCTIONCPU32Bug performs various operations in response to
S-RECORD INFORMATIONM68CPU32BUG REV 1 A-2Each record may be terminated with a CR/LF/NULL. Additionally, an S-record may have aninitial field to accom
S-RECORD INFORMATIONM68CPU32BUG REV 1 A-3A.4 S-RECORDS CREATIONS-record format files may be produced by dump utilities, debuggers, linkage editors, c
S-RECORD INFORMATIONM68CPU32BUG REV 1 A-4The next 16 character pairs of the first S1 record are the ASCII bytes of the actual programcode/data. In th
SELF-TEST ERROR MESSAGESM68CPU32BUG REV 1 B-1APPENDIX BSELF-TEST ERROR MESSAGESB.1 INTRODUCTIONOn power-up or reset, CPU32Bug executes a system self-
SELF-TEST ERROR MESSAGESM68CPU32BUG REV 1 B-2Table B-1. Self-Test Error Messages (continued)Test Type and Error Message Failure DescriptionROM Test:E
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-1APPENDIX CUSER CUSTOMIZATIONC.1 INTRODUCTIONWithin the CPU32Bug certain operating parameters may be customized
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-2C.2 CPU32BUG CUSTOMIZATIONThe general procedure for customizing CPU32Bug is as follows:1. Copy the parameter a
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-36. Verify the customized S-record file, C32B1.MX, by entering the command shownbelow. The -DC000 offset is req
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-49. Power up the newly programmed BCC and note the checksum value indicated.Repeat steps 1 through 8 above, to
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-5C.3 CUSTOMIZATION TABLETable C-1. CPU32Bug Customization AreaOffset Default Value Mnemonic Description$00-03 $0
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-2The commands use a modified Backus-Naur syntax. The meta-symbols are:<> The angular brackets en
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-6Table C-1. CPU32Bug Customization Area (continued)Offset Default Value Mnemonic DescriptionCommon Chip Select T
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-7Table C-1. CPU32Bug Customization Area (continued)Offset Default Value Mnemonic Description$70 $06 SYPCR_OR Val
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-8Table C-1. CPU32Bug Customization Area (continued)Offset Default Value Mnemonic DescriptionROM AUTO BOOT VECTOR
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-9Table C-1. CPU32Bug Customization Area (continued)Offset Default Value Mnemonic DescriptionConsole Default Tabl
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-10Table C-1. CPU32Bug Customization Area (continued)Offset Default Value Mnemonic DescriptionPower On Branch Vec
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-11Table C-1. CPU32Bug Customization Area (continued)Offset Default Value Mnemonic DescriptionInitialization Tabl
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-12Table C-1. CPU32Bug Customization Area (continued)Initialization Tables (continued)This entry format aligns wi
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-13Table C-1. CPU32Bug Customization Area (continued)Offset Default Value Mnemonic DescriptionSign On Text Messag
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-14C.4 COMMUNICATION FORMATSNot all combinations of data bits, parity, and stop bits are valid for the MCU SCI. T
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-15C.5 BCC REV. A CHIP SELECTION SUMMARYTable C-3 covers Rev. A of the M68332BCC Business Card Computer and M6833
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-32.2.1.1 Expression as a ParameterAn expression is one or more numeric values separated by the arithme
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-16C.6 BCC REV. B CHIP SELECTION SUMMARYTable C-4 covers Rev. B of the M68332BCC Business Card Computer and M6833
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-17C.7 BCC REV. C CHIP SELECTION SUMMARYThe table below covers Rev. C of the M68332BCC Business Card Computer and
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-18C.8 PLATFORM BOARD (PFB) REV. C COMPATIBILITYPFB Rev. C boards have jumpers (J8 - J13) which when installed, m
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-19C.9 CPU32BUG QUESTIONS AND ANSWERSQ: How can I change the chip selections to fit my application?A: Use the Chi
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-20Q: How can I change the Periodic Interrupt Timer (PIT) "tick" time for the SYSCALL timingfunctions?A
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-21Q: After I made the parameter change for an external clock (FEXTAL) and tied MODCK lowon header P2 by jumping
USER CUSTOMIZATIONM68CPU32BUG REV 1 C-22Q: How can I get CPU32Bug to automatically execute my user program upon power up?A: Use the ROM Auto Boot Vect
Motorola reserves the right to make changes without further notice to any products herein toimprove reliability, function or design. Motorola does not
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-4EXAMPLES Valid expressions.Expression Result (in hex)FF0011 FF001145+99 DE&45+&99 90@35+@67+@
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-5Table 2-1. Debugger Address Parameter FormatFormat Example DescriptionN 140 Absolute address+contents
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-6EXAMPLE A portion of the listing file of a re-locatable module assembled with theMC68300 Family DOS r
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-72.2.2 Port NumbersSome CPU32Bug commands allow the user to decide which port is the input or output p
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-82.5.1 CPU32Bug Vector Table and WorkspaceCPU32Bug requires 12k bytes of RAM to operate. On power-up o
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-9EXAMPLE Trace one instruction using debugger.CPU32Bug>RD<CR>PC =00003000 SR =2700=TR:OFF_S_7
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-102.5.2.2 Creating Vector TablesA user program may create a separate vector table to store its excepti
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-11EXAMPLE The user exception handler passes an exception along to the debugger.**** EXCEPT - Exception
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-12Before the normal register display information is printed, the exception type information isdisplaye
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-13The valid function code mnemonics are:Function Code Mnemonic Description0 F0 Unassigned, reserved1 U
TABLE OF CONTENTSM68CPU32BUG/D REV 1 iTABLE OF CONTENTSCHAPTER 1 GENERAL INFORMATION1.1 Introduction...
DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-14
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-1CHAPTER 3DEBUG MONITOR COMMANDS3.1 INTRODUCTIONThis chapter contains descriptions and examples of the C
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-2Table 3-1. Debug Monitor Commands (continued)CommandMnemonic Title ParagraphOF Offset Registers Display/
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-3BC Block of Memory Compare BC3.2 BLOCK OF MEMORY COMPAREBC <range><del><addr>[;B|W|L]
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-4BC Block of Memory Compare BCCPU32Bug>BC 4000:20 4100;B<CR>Effective address: 00004000Effective
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-5BF Block of Memory Fill BF3.3 BLOCK OF MEMORY FILLBF <range><del><data>[<del>&l
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-6BF Block of Memory Fill BFCPU32Bug>BF 4000:10 4E71 ;B<CR>Effective address: 00004000Effective c
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-7BM Block of Memory Move BM3.4 BLOCK OF MEMORY MOVEBM <range><del><addr> [;B|W|L]optio
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-8BM Block of Memory Move BMNow suppose the user would like to insert an NOP between the ADD.L instruction
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-9BR Breakpoint Insert BRNOBRBreakpoint Delete NOBR3.5 BREAKPOINT INSERT/DELETEBR {<addr>[:<coun
TABLE OF CONTENTSM68CPU32BUG/D REV 1 iiCHAPTER 3 DEBUG MONITOR COMMANDS (continued)3.8 Data Conversion (DC)...
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-10BS Block of Memory Search BS3.6 BLOCK OF MEMORY SEARCHBS <range><del><text> [;B|W|L]
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-11BS Block of Memory Search BSIn all three modes information on matches is output to the screen in a four
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-12BS Block of Memory Search BSCPU32Bug>BS 3000:18,2F2F<CR>Effective address: 00003000Mode 2, usi
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-13BV Block of Memory Verify BV3.7 BLOCK OF MEMORY VERIFYBV <range><del><data> [<del
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-14BV Block of Memory Verify BVEXAMPLES Assume memory from $6000 to $602F is as indicated.CPU32Bug>MD 6
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-15DC Data Conversion DC3.8 DATA CONVERSIONDC <exp>I<addr>Use the DC command to simplify an e
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-16DU Dump S-Records DU3.9 DUMP S-RECORDSDU [<port><del>]<range><del>[<text>
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-17DU Dump S-Records DUDump 10 bytes of memory beginning at $3000 to terminal screen (port 0).CPU32Bug>
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-18DU Dump S-Records DUEnter ALT-F1 again to close the log file TEST.MX. The log file contains the extra l
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-19GD Go Direct (Ignore Breakpoints) GD3.10 GO DIRECT (IGNORE BREAKPOINTS)GD [<addr>]Use the GD com
TABLE OF CONTENTSM68CPU32BUG/D REV 1 iiiCHAPTER 4 ASSEMBLER/DISASSEMBLER (continued)4.2.1.3 Disassembled Source Line ...
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-20GD Go Direct (Ignore Breakpoints) GDTo exit target code, press ABORT pushbutton.Exception: AbortPC =000
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-21GN Go To Next Instruction GN3.11 GO TO NEXT INSTRUCTIONGNUse the GN command to set a temporary breakpo
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-22GN Go To Next Instruction GNUse the GN command to trace through the subroutine call and display the res
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-23GO Go Execute User Program GO3.12 GO EXECUTE USER PROGRAMGO [<addr>]Use the GO command (alias G)
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-24GO Go Execute User Program GOInitialize D0, set breakpoints, and start target program:D0 =00000000 ?
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-25GO Go Execute User Program GOPress the ABORT pushbutton on the platform board to exit target code.Excep
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-26GT Go To Temporary Breakpoint GT3.13 GO TO TEMPORARY BREAKPOINTGT <addr>[:<count>]Use the
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-27GT Go To Temporary Breakpoint GTCPU32Bug>GT 4006<CR>Effective address: 00004006Tempory breakpo
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-28HE Help HE3.14 HELPHE [<command>]HE is the CPU32Bug help facility. HE <CR> displays all av
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-29HE Help HESD Switch DirectoryT Trace InstructionTC Trace on Change of FlowTM Transparent ModeTT Trace t
TABLE OF CONTENTSM68CPU32BUG/D REV 1 ivCHAPTER 6 DIAGNOSTIC FIRMWARE GUIDE6.1 Introduction...
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-30HE Help HENOMAL Disable Macro Expansion ListingMD Memory DisplayMM Memory ModifyM "Alias" for
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-31LO Load S-Records From Host LO3.15 LOAD S-RECORDS FROM HOSTLO [<port><del>][<addr>][
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-32LO Load S-Records From Host LOOther options:-C Ignore checksum. A checksum for the data contained withi
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-33LO Load S-Records From Host LOEXAMPLES Suppose a host computer was used to create a program that looks
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-34MA Macro Define/Display MANOMAMacro Delete NOMA3.16 MACRO DEFINE/DISPLAY/DELETEMA [<name>]NOMA [
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-35MA Macro Define/Display MANOMAMacro Delete NOMAThe second argument is used whenever the sequence "
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-36MA Macro Define/Display MANOMAMacro Delete NOMACPU32Bug>MA ASM<CR> Define macro ASM.M=MM \0;DI
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-37MAE Macro Edit MAE3.17 MACRO EDITMAE <name><del><line#><del>[<string>]Wh
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-38MAE Macro Edit MAEEXAMPLESCPU32Bug>MA<CR> List definitions of macro ABC.MACRO ABC010 MD 300002
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-39MAL Macro Expansion Listing Enable MALNOMALMacro Expansion Listing Disable NOMAL3.18 MACRO EXPANSION L
TABLE OF CONTENTSM68CPU32BUG/D REV 1 vAPPENDIX A S-RECORD INFORMATIONA.1 Introduction...
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-40MD Memory Display MD3.19 MEMORY DISPLAYMD[S] <addr>[:<count>|<addr>][; [B|W|L|DI]]Us
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-41MD Memory Display MDCPU32Bug>md 5008;di<CR>00005008 46FC2700 MOVE.W #$2700,SR0000500C 61FF0000
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-42MM Memory Modify MM3.20 MEMORY MODIFYMM <addr>[;[[B|W|L][A][N]]|[DI]]Use the MM command (alias M
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-43MM Memory Modify MMEXAMPLESCPU32Bug>MM 3100<CR> Access location 3100.00003100 1234?<CR>0
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-44MS Memory Set MS3.21 MEMORY SETMS <addr>{hexadecimal number}/{’string’}Use the MS command to wri
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-45OF Offset Registers Display/Modify OF3.22 OFFSET REGISTERS DISPLAY/MODIFYOF [Rn[;A]]The OF command all
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-46OF Offset Registers Display/Modify OFOffset register rules:• At power-up and cold-start reset, R7 is t
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-47OF Offset Registers Display/Modify OFSet R0 as the automatic register.CPU32Bug>OF R0;A<CR>R0*=
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-48PA Printer Attached PANOPAPrinter Detached NOPA3.23 PRINTER ATTACH/DETACHPA [<port>]NOPA [<po
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-49PF Port Format PF3.24 PORT FORMATPF [<port>]Use the PF command to display and change the serial
TABLE OF CONTENTSM68CPU32BUG/D REV 1 viLIST OF FIGURESFIGURES PAGE1-1. CPU32Bug Operation Mode Flow Diagram ...
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-50PF Port Format PF( the next response demonstrates reversing the prompting order )XON/XOFF protocol [Y,N
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-51PF Port Format PF3.24.4 New Port AssignmentPF supports a set of drivers for a number of different boar
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-52RD Register Display RD3.25 REGISTER DISPLAYRD {[+|-|=][<dname>][/]}{[+|-|=][<reg1>[-<re
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-53RD Register Display RDObserve the following when specifying any arguments in the command line:• The qu
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-54RD Register Display RDEXAMPLESCPU32Bug>rd<CR>PC =00003000 SR =2700=TR:OFF_S_7_... VBR =00000
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-55RD Register Display RDThe source and destination function code registers (SFC, DFC) include a two chara
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-56RESET Cold/Warm Reset RESET3.26 COLD/WARM RESETRESETUse the RESET command to specify the reset operati
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-57RM Register Modify RM3.27 REGISTER MODIFYRM <reg>Use the RM command to display and change the ta
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-58RS Register Set RS3.28 REGISTER SETRS <reg>[<exp>][;A]Use the RS command to display or cha
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-59SD Switch Directories SD3.29 SWITCH DIRECTORIESSDUse the SD command to toggle between the debugger dir
GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-1CHAPTER 1GENERAL INFORMATION1.1 INTRODUCTIONThis chapter provides a general description, installation inst
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-60T Trace T3.30 TRACET [<count>]Use the T command to execute one instruction at a time and display
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-61T Trace TDisplay target registers and trace one instruction:CPU32Bug>RD<CR>PC =00007000 SR =27
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-62T Trace TTrace the next two instructions:CPU32Bug>T 2<CR>PC =00007006 SR =2700=TR:OFF_S_7_...
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-63TC Trace On Change Of Control Flow TC3.31 TRACE ON CHANGE OF CONTROL FLOWTC [<count>]Use the TC
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-64TC Trace On Change Of Control Flow TCTrace on change of flow:CPU32Bug>TC<CR>00007008 66FA
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-65TM Transparent Mode TM3.32 TRANSPARENT MODETM [<port>][<escape>]The TM command connects th
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-66TT Trace To Temporary Breakpoint TT3.33 TRACE TO TEMPORARY BREAKPOINTTT <addr>Use the TT command
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-67TT Trace To Temporary Breakpoint TTTrace to temporary breakpoint:CPU32Bug>TT 7006<CR>PC =00007
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-68VE Verify S-Records Against Memory VE3.34 VERIFY S-RECORDS AGAINST MEMORYVE [<port>][<addr>
DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-69VE Verify S-Records Against Memory VEhost system does not echo characters that the first record transfe
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