Motorola MCU 68HC912D60 Manual de usuario descargar pdf (Pagina 9)

68HC912D60MSE4 Rev 2 9

March 14, 2001

GPIO: FUNCTION CANNOT BE RE-ENABLED ON TX PIN IMMEDIATELY

AR571

The Tx pin cannot be changed to GPIO immediately. The GPIO function will

become enabled only after the current transmission is complete.

Work-

around

Wait until the trasmit buffer is empty (TDRE == 1) and then disable the

transmission (Set TE == 0) while transmission is in progress.

ESD: ELECTROSTATIC DISCHARGE PERFORMANCE

The 68HC912D60 (4F73K) passes AEC ESD only upto and including the following

voltages:

– 1000V Human Body Model

– 100V Machine Model

PLL: LIMP HOME MODE AR627

The device can prematurely indicate that the oscillator has stabilized releasing the

part from Limp Home clock mode to the oscillator clock mode with an unstable

oscillator. This can cause unpredictable behavior of the MCU. This situation can

arise with short external power-on reset periods and / or crystal oscillator circuits

that exhibit slow startup characteristics. If the PLL is not being used (Vddpll

connected to Vss) Limp Home mode is disabled and this issue does not apply.

All customers should review any applications based on the referenced devices. If

the crystal clock is stabilized before the external RESET line is released and the

customer is not using stop mode (pseudo-stop is not affected) then there is no

problem. If the clock is not stable when external RESET is released then they

should contact Motorola for consultation.

Common practice for the start up mode of operation of HC12 microcontrollers is for

the external RESET line to be held active until such time as the crystal has

stabilized at its operating frequency. On release of the external RESET line and

when the WCR (counter register) reaches a count of 4096 cycles, normal operating

mode is entered with the CPU clocked from the crystal frequency (see fig. 1).

The HC12 mode of operation known as Limp-Home Mode (LHM) is enabled when

the VDDPLL pin is at VDD and is entered if for any reason the external crystal

ceases to oscillate. During this mode the CPU will be clocked from the free-running

VCO clock of the PLL (at a nominal frequency of 1MHz). If LHM is enabled during

the start-up phase (i.e. VDDPLL=5V, NOLHM bit=0) and the external RESET line

is not held active until after the crystal frequency is stable then the device starts up

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Motorola MCU 68HC912D60 Manual de usuario Pagina 9