Motorola MPC5200 Manual de usuario descargar pdf (Pagina 20)

MPC5200 Data Sheet, Rev. 4

Electrical and Thermal Characteristics

Freescale Semiconductor20

3.3.5 SDRAM

3.3.5.1 Memory Interface Timing-Standard SDRAM Read Command

Figure 5. Timing Diagram—Standard SDRAM Memory Read Timing

3.3.5.2 Memory Interface Timing-Standard SDRAM Write Command

In Standard SDRAM, all signals are activated on the Mem_clk from the Memory Controller and captured

on the Mem_clk clock at the memory device.

Table 18. Standard SDRAM Memory Read Timing

Sym Description Min Max Units SpecID

mem_clk

MEM_CLK period 7.5 — ns A5.1

valid

Control Signals, Address and MBA Valid after

rising edge of MEM_CLK

—t

mem_clk

*0.5+0.4 ns A5.2

hold

Control Signals, Address and MBA Hold after

rising edge of MEM_CLK

mem_clk

*0.5 — ns A5.3

valid

DQM valid after rising edge of MEM_CLK — t

mem_clk

*0.25+0.4 ns A5.4

hold

DQM hold after rising edge of MEM_CLK t

mem_clk

*0.25-0.7 — ns A5.5

data

setup

MDQ setup to rising edge of MEM_CLK — 0.3 ns A5.6

data

hold

MDQ hold after rising edge of MEM_CLK 0.2 — ns A5.7

MEM_CLK

Control Signals

MDQ (Data)

MA (Address)

NOTE: Control Signals are composed of RAS, CAS, MEM_WE

, MEM_CS, MEM_CS1 and CLK_EN

Active NOP READ NOPNOPNOP NOP

hold

Row Column

MBA (Bank Selects)

valid

hold

valid

hold

valid

DQM (Data Mask)

valid

hold

NOP

data

hold

data

setup

1 2 ... 15 16 17 18 19 20 21 22 23 24 25 ... 79 80

Comentarios a estos manuales

Sin comentarios

Motorola MPC5200 Manual de usuario Pagina 20

Comentarios a estos manuales

Relacionado con productos y manuales para Redes Motorola MPC5200